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authorYann Gautier <yann.gautier@st.com>2019-02-14 11:01:20 +0100
committerYann Gautier <yann.gautier@st.com>2019-02-14 11:20:23 +0100
commit7ae58c6ba79fee3cc032aae2105b073304409ebc (patch)
tree285ded01264f6dc644bd7adda5736e9b9da448af /drivers/st/reset/stm32mp1_reset.c
parent447b2b137d7286a1ef451336c6e73fb7fd8999a1 (diff)
downloadtrusted-firmware-a-7ae58c6ba79fee3cc032aae2105b073304409ebc.tar.gz
stm32mp1: use functions to retrieve some peripheral addresses
PWR, RCC, DDRPHYC & DDRCTRL addresses can be retrieved from device tree. Platform asserts the value read from the DT are the SoC addresses. Change-Id: I43f0890b51918a30c87ac067d3780ab27a0f59de Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
Diffstat (limited to 'drivers/st/reset/stm32mp1_reset.c')
-rw-r--r--drivers/st/reset/stm32mp1_reset.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/st/reset/stm32mp1_reset.c b/drivers/st/reset/stm32mp1_reset.c
index b9a7ac7c9..b2de76085 100644
--- a/drivers/st/reset/stm32mp1_reset.c
+++ b/drivers/st/reset/stm32mp1_reset.c
@@ -20,9 +20,10 @@ void stm32mp_reset_assert(uint32_t id)
{
uint32_t offset = (id / (uint32_t)__LONG_BIT) * sizeof(uintptr_t);
uint32_t bit = id % (uint32_t)__LONG_BIT;
+ uintptr_t rcc_base = stm32mp_rcc_base();
- mmio_write_32(RCC_BASE + offset, BIT(bit));
- while ((mmio_read_32(RCC_BASE + offset) & BIT(bit)) == 0U) {
+ mmio_write_32(rcc_base + offset, BIT(bit));
+ while ((mmio_read_32(rcc_base + offset) & BIT(bit)) == 0U) {
;
}
}
@@ -32,9 +33,10 @@ void stm32mp_reset_deassert(uint32_t id)
uint32_t offset = ((id / (uint32_t)__LONG_BIT) * sizeof(uintptr_t)) +
RST_CLR_OFFSET;
uint32_t bit = id % (uint32_t)__LONG_BIT;
+ uintptr_t rcc_base = stm32mp_rcc_base();
- mmio_write_32(RCC_BASE + offset, BIT(bit));
- while ((mmio_read_32(RCC_BASE + offset) & BIT(bit)) != 0U) {
+ mmio_write_32(rcc_base + offset, BIT(bit));
+ while ((mmio_read_32(rcc_base + offset) & BIT(bit)) != 0U) {
;
}
}