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authorAndrew Thoelke <andrew.thoelke@arm.com>2014-03-18 13:46:55 +0000
committerAndrew Thoelke <andrew.thoelke@arm.com>2014-03-26 21:54:37 +0000
commit0a30cf54af7bb1f77b405062b1d5b44e809d0290 (patch)
tree9b7acf35e8b41803fb7a836dce428a9924ba1587 /bl32/tsp/aarch64/tsp_entrypoint.S
parentdccc537a7243d784e0b8b81ce1634e385c3b048b (diff)
downloadtrusted-firmware-a-0a30cf54af7bb1f77b405062b1d5b44e809d0290.tar.gz
Place assembler functions in separate sections
This extends the --gc-sections behaviour to the many assembler support functions in the firmware images by placing each function into its own code section. This is achieved by creating a 'func' macro used to declare each function label. Fixes ARM-software/tf-issues#80 Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
Diffstat (limited to 'bl32/tsp/aarch64/tsp_entrypoint.S')
-rw-r--r--bl32/tsp/aarch64/tsp_entrypoint.S15
1 files changed, 7 insertions, 8 deletions
diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S
index fd02fd8926..8bfe454a10 100644
--- a/bl32/tsp/aarch64/tsp_entrypoint.S
+++ b/bl32/tsp/aarch64/tsp_entrypoint.S
@@ -31,6 +31,7 @@
#include <bl_common.h>
#include <arch.h>
#include <tsp.h>
+#include <asm_macros.S>
.globl tsp_entrypoint
@@ -53,10 +54,8 @@
smc #0
.endm
- .section .text, "ax"; .align 3
-
-tsp_entrypoint: ; .type tsp_entrypoint, %function
+func tsp_entrypoint
/*---------------------------------------------
* Store the extents of the tzram available to
* BL32 for future use.
@@ -161,7 +160,7 @@ tsp_entrypoint_panic:
* here except for acknowledging the request.
* ---------------------------------------------
*/
-tsp_cpu_off_entry: ; .type tsp_cpu_off_entry, %function
+func tsp_cpu_off_entry
bl tsp_cpu_off_main
restore_args_call_smc
@@ -176,7 +175,7 @@ tsp_cpu_off_entry: ; .type tsp_cpu_off_entry, %function
* will be aarch64 and exceptions masked.
* ---------------------------------------------
*/
-tsp_cpu_on_entry: ; .type tsp_cpu_on_entry, %function
+func tsp_cpu_on_entry
/* ---------------------------------------------
* Set the exception vector to something sane.
* ---------------------------------------------
@@ -236,7 +235,7 @@ tsp_cpu_on_entry_panic:
* the EL1 state.
* ---------------------------------------------
*/
-tsp_cpu_suspend_entry: ; .type tsp_cpu_suspend_entry, %function
+func tsp_cpu_suspend_entry
bl tsp_cpu_suspend_main
restore_args_call_smc
@@ -250,7 +249,7 @@ tsp_cpu_suspend_entry: ; .type tsp_cpu_suspend_entry, %function
* acknowledging the request.
* ---------------------------------------------
*/
-tsp_cpu_resume_entry: ; .type tsp_cpu_resume_entry, %function
+func tsp_cpu_resume_entry
bl tsp_cpu_resume_main
restore_args_call_smc
tsp_cpu_resume_panic:
@@ -261,7 +260,7 @@ tsp_cpu_resume_panic:
* the TSP to service a fast smc request.
* ---------------------------------------------
*/
-tsp_fast_smc_entry: ; .type tsp_fast_smc_entry, %function
+func tsp_fast_smc_entry
bl tsp_fast_smc_handler
restore_args_call_smc
tsp_fast_smc_entry_panic: