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authorVishnu Banavath <vishnu.banavath@arm.com>2019-08-07 10:49:05 +0100
committerAbdellatif El Khlifi <abdellatif.elkhlifi@arm.com>2020-02-17 17:04:46 +0000
commit6aa138ded5e684894cd146fc1bb85df304529b46 (patch)
tree7b91521355b19fccff090ea032b6162aab816210
parent93cf1f6454b9ba5b1a5946acd3bae9618f1512d6 (diff)
downloadtrusted-firmware-a-6aa138ded5e684894cd146fc1bb85df304529b46.tar.gz
corstone700: set UART clocks to 32MHz
Adding support for 32MHz UART clock and selecting it as the default UART clock Change-Id: I9541eaff70424e85a3b5ee4820ca0e7efb040d2c Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com> Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-rw-r--r--fdts/corstone700.dts17
-rw-r--r--plat/arm/board/corstone700/include/platform_def.h13
2 files changed, 25 insertions, 5 deletions
diff --git a/fdts/corstone700.dts b/fdts/corstone700.dts
index 16cf41227..8c3bd0c05 100644
--- a/fdts/corstone700.dts
+++ b/fdts/corstone700.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2019-2020, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -68,14 +68,21 @@
clock-output-names = "smclk";
};
+ uartclk: uartclk {
+ /* UART clock - 32MHz */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32000000>;
+ clock-output-names = "uartclk";
+ };
serial0: uart@1a510000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x1a510000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 19 4>;
- clocks = <&refclk100mhz>, <&smbclk>;
- clock-names = "apb_pclk", "smclk";
+ clocks = <&uartclk>, <&refclk100mhz>;
+ clock-names = "uartclk", "apb_pclk";
};
serial1: uart@1a520000 {
@@ -83,8 +90,8 @@
reg = <0x1a520000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 20 4>;
- clocks = <&refclk100mhz>, <&smbclk>;
- clock-names = "apb_pclk", "smclk";
+ clocks = <&uartclk>, <&refclk100mhz>;
+ clock-names = "uartclk", "apb_pclk";
};
timer {
diff --git a/plat/arm/board/corstone700/include/platform_def.h b/plat/arm/board/corstone700/include/platform_def.h
index 636190700..0fb74e442 100644
--- a/plat/arm/board/corstone700/include/platform_def.h
+++ b/plat/arm/board/corstone700/include/platform_def.h
@@ -9,10 +9,23 @@
#include <lib/utils_def.h>
#include <lib/xlat_tables/xlat_tables_defs.h>
+
#include <plat/arm/board/common/v2m_def.h>
#include <plat/arm/common/arm_spm_def.h>
#include <plat/common/common_def.h>
+/* PL011 UART related constants */
+#ifdef V2M_IOFPGA_UART0_CLK_IN_HZ
+#undef V2M_IOFPGA_UART0_CLK_IN_HZ
+#endif
+
+#ifdef V2M_IOFPGA_UART1_CLK_IN_HZ
+#undef V2M_IOFPGA_UART1_CLK_IN_HZ
+#endif
+
+#define V2M_IOFPGA_UART0_CLK_IN_HZ 32000000
+#define V2M_IOFPGA_UART1_CLK_IN_HZ 32000000
+
/* Core/Cluster/Thread counts for Corstone700 */
#define CORSTONE700_CLUSTER_COUNT U(1)
#define CORSTONE700_MAX_CPUS_PER_CLUSTER U(4)