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authorMark Dykes <mardyk01@review.trustedfirmware.org>2020-06-29 15:58:23 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2020-06-29 15:58:23 +0000
commit5d1a225716f0aef2382c8787b390426679466852 (patch)
tree16e9d4f99d7e976b76c064c3ce7e5805fdfb133c
parenta021b2dd871bba7cbbb578f53105a477ba5bda54 (diff)
parent986419939a3fcddbb524dccd90c139473396d057 (diff)
downloadtrusted-firmware-a-5d1a225716f0aef2382c8787b390426679466852.tar.gz
Merge "stm32mp1: check stronger the secondary CPU entry point" into integration
-rw-r--r--plat/st/stm32mp1/stm32mp1_pm.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/plat/st/stm32mp1/stm32mp1_pm.c b/plat/st/stm32mp1/stm32mp1_pm.c
index cf9fa8e69..31a9ae7f1 100644
--- a/plat/st/stm32mp1/stm32mp1_pm.c
+++ b/plat/st/stm32mp1/stm32mp1_pm.c
@@ -10,6 +10,7 @@
#include <platform_def.h>
#include <arch_helpers.h>
+#include <bl32/sp_min/platform_sp_min.h>
#include <common/debug.h>
#include <drivers/arm/gic_common.h>
#include <drivers/arm/gicv2.h>
@@ -68,9 +69,8 @@ static int stm32_pwr_domain_on(u_register_t mpidr)
return PSCI_E_INVALID_PARAMS;
}
- if ((stm32_sec_entrypoint < STM32MP_SYSRAM_BASE) ||
- (stm32_sec_entrypoint > (STM32MP_SYSRAM_BASE +
- (STM32MP_SYSRAM_SIZE - 1)))) {
+ /* Only one valid entry point */
+ if (stm32_sec_entrypoint != (uintptr_t)&sp_min_warm_entrypoint) {
return PSCI_E_INVALID_ADDRESS;
}