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authorMark Dykes <mardyk01@review.trustedfirmware.org>2020-01-23 16:11:27 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2020-01-23 16:11:27 +0000
commit4302e045fd435868be6c24a1da842b512d0ab315 (patch)
treec846534fa9000a2728bb7af717d871c70cb84474
parent0908c31a3ecbcff98d184540844f6a498b13138f (diff)
parent3b5454efacb481817efee8ac3bbd6d20cdd50153 (diff)
downloadtrusted-firmware-a-4302e045fd435868be6c24a1da842b512d0ab315.tar.gz
Merge "Revert "Changes necessary to support SEPARATE_NOBITS_REGION feature"" into integration
-rw-r--r--bl31/aarch64/bl31_entrypoint.S14
-rw-r--r--bl31/aarch64/runtime_exceptions.S5
-rw-r--r--bl31/bl31.ld.S3
-rw-r--r--lib/el3_runtime/aarch64/cpu_data.S5
4 files changed, 10 insertions, 17 deletions
diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S
index 2d672dd12..665a05e88 100644
--- a/bl31/aarch64/bl31_entrypoint.S
+++ b/bl31/aarch64/bl31_entrypoint.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -110,17 +110,13 @@ func bl31_entrypoint
* caches and participate in coherency.
* --------------------------------------------------------------------
*/
- adrp x0, __DATA_START__
- add x0, x0, :lo12:__DATA_START__
- adrp x1, __DATA_END__
- add x1, x1, :lo12:__DATA_END__
+ adr x0, __DATA_START__
+ adr x1, __DATA_END__
sub x1, x1, x0
bl clean_dcache_range
- adrp x0, __BSS_START__
- add x0, x0, :lo12:__BSS_START__
- adrp x1, __BSS_END__
- add x1, x1, :lo12:__BSS_END__
+ adr x0, __BSS_START__
+ adr x1, __BSS_END__
sub x1, x1, x0
bl clean_dcache_range
diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
index 1619914b8..51f5b7b34 100644
--- a/bl31/aarch64/runtime_exceptions.S
+++ b/bl31/aarch64/runtime_exceptions.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -414,8 +414,7 @@ smc_handler64:
orr x16, x16, x15, lsl #FUNCID_OEN_WIDTH
/* Load descriptor index from array of indices */
- adrp x14, rt_svc_descs_indices
- add x14, x14, :lo12:rt_svc_descs_indices
+ adr x14, rt_svc_descs_indices
ldrb w15, [x14, x16]
/* Any index greater than 127 is invalid. Check bit 7. */
diff --git a/bl31/bl31.ld.S b/bl31/bl31.ld.S
index 86fe23608..42227f0f3 100644
--- a/bl31/bl31.ld.S
+++ b/bl31/bl31.ld.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -208,7 +208,6 @@ SECTIONS
* Define a linker symbol to mark end of the RW memory area for this
* image.
*/
- . = ALIGN(PAGE_SIZE);
__RW_END__ = .;
__BL31_END__ = .;
diff --git a/lib/el3_runtime/aarch64/cpu_data.S b/lib/el3_runtime/aarch64/cpu_data.S
index 2392d6b90..2edf22559 100644
--- a/lib/el3_runtime/aarch64/cpu_data.S
+++ b/lib/el3_runtime/aarch64/cpu_data.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -41,8 +41,7 @@ endfunc init_cpu_data_ptr
func _cpu_data_by_index
mov_imm x1, CPU_DATA_SIZE
mul x0, x0, x1
- adrp x1, percpu_data
- add x1, x1, :lo12:percpu_data
+ adr x1, percpu_data
add x0, x0, x1
ret
endfunc _cpu_data_by_index