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authorAlexei Fedorov <Alexei.Fedorov@arm.com>2020-01-23 17:16:07 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2020-01-23 17:16:07 +0000
commit208ebe7c915880dd7cf9ac16caba9ed6abc02ac8 (patch)
tree62b4056b5a499a837cea0cca878cd9d9532e0743
parent744a1d6e06492ef0a744fe0e0ffae8d05e2dad58 (diff)
parent31ce893ec29197c51e3814648ad0dd2acf4a31a7 (diff)
downloadtrusted-firmware-a-208ebe7c915880dd7cf9ac16caba9ed6abc02ac8.tar.gz
Merge "xilinx: versal: PLM to ATF handover" into integration
-rw-r--r--docs/plat/xilinx-versal.rst8
-rw-r--r--plat/xilinx/versal/aarch64/versal_common.c10
-rw-r--r--plat/xilinx/versal/bl31_versal_setup.c34
-rw-r--r--plat/xilinx/versal/include/platform_def.h6
-rw-r--r--plat/xilinx/versal/include/versal_def.h6
-rw-r--r--plat/xilinx/versal/platform.mk4
6 files changed, 47 insertions, 21 deletions
diff --git a/docs/plat/xilinx-versal.rst b/docs/plat/xilinx-versal.rst
index 95c89a8b29..57a363bc95 100644
--- a/docs/plat/xilinx-versal.rst
+++ b/docs/plat/xilinx-versal.rst
@@ -33,3 +33,11 @@ Xilinx Versal platform specific build options
* `VERSAL_PLATFORM`: Select the platform. Options:
- `versal_virt` : Versal Virtual platform
+
+# PLM->TF-A Parameter Passing
+------------------------------
+The PLM populates a data structure with image information for the TF-A. The TF-A
+uses that data to hand off to the loaded images. The address of the handoff
+data structure is passed in the ```PMC_GLOBAL_GLOB_GEN_STORAGE4``` register.
+The register is free to be used by other software once the TF-A is bringing up
+further firmware images.
diff --git a/plat/xilinx/versal/aarch64/versal_common.c b/plat/xilinx/versal/aarch64/versal_common.c
index 825421e297..2fa8476584 100644
--- a/plat/xilinx/versal/aarch64/versal_common.c
+++ b/plat/xilinx/versal/aarch64/versal_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -67,11 +67,3 @@ unsigned int plat_get_syscnt_freq2(void)
return VERSAL_CPU_CLOCK;
}
-uintptr_t plat_get_ns_image_entrypoint(void)
-{
-#ifdef PRELOADED_BL33_BASE
- return PRELOADED_BL33_BASE;
-#else
- return PLAT_VERSAL_NS_IMAGE_OFFSET;
-#endif
-}
diff --git a/plat/xilinx/versal/bl31_versal_setup.c b/plat/xilinx/versal/bl31_versal_setup.c
index 6b56307af3..a5cf05e9af 100644
--- a/plat/xilinx/versal/bl31_versal_setup.c
+++ b/plat/xilinx/versal/bl31_versal_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,8 +13,12 @@
#include <common/debug.h>
#include <drivers/arm/pl011.h>
#include <drivers/console.h>
+#include <lib/mmio.h>
#include <lib/xlat_tables/xlat_tables.h>
#include <plat/common/platform.h>
+#include <versal_def.h>
+#include <plat_private.h>
+#include <plat_startup.h>
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
@@ -37,6 +41,18 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
}
/*
+ * Set the build time defaults,if we can't find any config data.
+ */
+static inline void bl31_set_default_config(void)
+{
+ bl32_image_ep_info.pc = BL32_BASE;
+ bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
+ bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
+ bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
+ DISABLE_ALL_EXCEPTIONS);
+}
+
+/*
* Perform any BL31 specific platform actions. Here is an opportunity to copy
* parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
* are lost (potentially). This needs to be done before the MMU is initialized
@@ -45,6 +61,7 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
+ uint64_t atf_handoff_addr;
/* Initialize the console to provide early debug support */
int rc = console_pl011_register(VERSAL_UART_BASE,
@@ -76,12 +93,15 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
- /* use build time defaults in JTAG boot mode */
- bl32_image_ep_info.pc = BL32_BASE;
- bl32_image_ep_info.spsr = 0;
- bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
- bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
- DISABLE_ALL_EXCEPTIONS);
+ atf_handoff_addr = mmio_read_32(PMC_GLOBAL_GLOB_GEN_STORAGE4);
+ enum fsbl_handoff ret = fsbl_atf_handover(&bl32_image_ep_info,
+ &bl33_image_ep_info,
+ atf_handoff_addr);
+ if (ret == FSBL_HANDOFF_NO_STRUCT) {
+ bl31_set_default_config();
+ } else if (ret != FSBL_HANDOFF_SUCCESS) {
+ panic();
+ }
NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc);
NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc);
diff --git a/plat/xilinx/versal/include/platform_def.h b/plat/xilinx/versal/include/platform_def.h
index bcc7a93643..9f8392ce91 100644
--- a/plat/xilinx/versal/include/platform_def.h
+++ b/plat/xilinx/versal/include/platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -56,9 +56,9 @@
* BL33 specific defines.
******************************************************************************/
#ifndef PRELOADED_BL33_BASE
-# define PLAT_VERSAL_NS_IMAGE_OFFSET 0x8000000
+# define PLAT_ARM_NS_IMAGE_BASE 0x8000000
#else
-# define PLAT_VERSAL_NS_IMAGE_OFFSET PRELOADED_BL33_BASE
+# define PLAT_ARM_NS_IMAGE_BASE PRELOADED_BL33_BASE
#endif
/*******************************************************************************
diff --git a/plat/xilinx/versal/include/versal_def.h b/plat/xilinx/versal/include/versal_def.h
index 94bd321b81..9a9b7c0178 100644
--- a/plat/xilinx/versal/include/versal_def.h
+++ b/plat/xilinx/versal/include/versal_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -121,6 +121,10 @@
#define APU_0_PWRCTL_CPUPWRDWNREQ_MASK 1
#define APU_1_PWRCTL_CPUPWRDWNREQ_MASK 2
+/* PMC registers and bitfields */
+#define PMC_GLOBAL_BASE 0xF1110000
+#define PMC_GLOBAL_GLOB_GEN_STORAGE4 (PMC_GLOBAL_BASE + 0x40)
+
/* IPI registers and bitfields */
#define IPI0_REG_BASE 0xFF330000
#define IPI0_TRIG_BIT (1 << 2)
diff --git a/plat/xilinx/versal/platform.mk b/plat/xilinx/versal/platform.mk
index 7a8bfa31ae..1e231cce8f 100644
--- a/plat/xilinx/versal/platform.mk
+++ b/plat/xilinx/versal/platform.mk
@@ -1,4 +1,4 @@
-# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -55,6 +55,7 @@ PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
drivers/arm/pl011/aarch64/pl011_console.S \
plat/common/aarch64/crash_console_helpers.S \
plat/arm/common/arm_cci.c \
+ plat/arm/common/arm_common.c \
plat/common/plat_gicv3.c \
plat/xilinx/versal/aarch64/versal_helpers.S \
plat/xilinx/versal/aarch64/versal_common.c
@@ -64,6 +65,7 @@ BL31_SOURCES += drivers/arm/cci/cci.c \
lib/cpus/aarch64/cortex_a72.S \
plat/common/plat_psci_common.c \
plat/xilinx/common/ipi.c \
+ plat/xilinx/common/plat_startup.c \
plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
plat/xilinx/common/pm_service/pm_ipi.c \
plat/xilinx/versal/bl31_versal_setup.c \