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authorOlivier Deprez <olivier.deprez@arm.com>2019-12-13 13:40:01 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2019-12-13 13:40:01 +0000
commit3c96c4b7a1e650aaf6a13e91d1beecce00a8233a (patch)
tree10aa54143d3dd355bbcaa39f7dcf662679bebe19
parent58c5d7067db9102e0c754d8bfb7d76622a802d4e (diff)
parent2198e9a1fb8c48c68dc9aa5180ef6ceaca135c29 (diff)
downloadtf-a-tests-3c96c4b7a1e650aaf6a13e91d1beecce00a8233a.tar.gz
Merge "TFTF: Add missing D-cache invalidation"
-rw-r--r--tftf/framework/aarch32/entrypoint.S14
-rw-r--r--tftf/framework/aarch64/entrypoint.S12
2 files changed, 25 insertions, 1 deletions
diff --git a/tftf/framework/aarch32/entrypoint.S b/tftf/framework/aarch32/entrypoint.S
index 1f302fa84..eaa078831 100644
--- a/tftf/framework/aarch32/entrypoint.S
+++ b/tftf/framework/aarch32/entrypoint.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -19,6 +19,18 @@ func tftf_entrypoint
bl arch_init
/* --------------------------------------------------------------------
+ * Invalidate the RW memory used by TFTF image.
+ * This is done to safeguard against possible corruption of this
+ * memory by dirty cache lines in a system cache as a result of use
+ * by an earlier boot loader stage.
+ * --------------------------------------------------------------------
+ */
+ ldr r0, =__DATA_START__
+ ldr r1, =__DATA_END__
+ sub r1, r1, r0
+ bl inv_dcache_range
+
+ /* --------------------------------------------------------------------
* This code is expected to be executed only by the primary CPU.
* Save the mpid for the first core that executes and if a secondary
* CPU has lost its way make it spin forever.
diff --git a/tftf/framework/aarch64/entrypoint.S b/tftf/framework/aarch64/entrypoint.S
index 0a4afe0e0..81fd207b4 100644
--- a/tftf/framework/aarch64/entrypoint.S
+++ b/tftf/framework/aarch64/entrypoint.S
@@ -20,6 +20,18 @@ func tftf_entrypoint
bl arch_init
/* --------------------------------------------------------------------
+ * Invalidate the RW memory used by TFTF image.
+ * This is done to safeguard against possible corruption of this
+ * memory by dirty cache lines in a system cache as a result of use
+ * by an earlier boot loader stage.
+ * --------------------------------------------------------------------
+ */
+ adr x0, __DATA_START__
+ adr x1, __DATA_END__
+ sub x1, x1, x0
+ bl inv_dcache_range
+
+ /* --------------------------------------------------------------------
* This code is expected to be executed only by the primary CPU.
* Save the mpid for the first core that executes and if a secondary
* CPU has lost its way make it spin forever.